What problem does Ziptronix solve?
ZT develops and licenses Semiconductor processing IP for bonding and high density interconnect applications to be used for 3D stacking and 2D tiling applications. The technology is compatible with standard Fab tools and can be easily and quickly implemented into existing production lines.
Do I need specially processed and expensive wafers to perform this Ziptronix bond?
The Ziptronix ZiBond™ process works with any wafer or substrate material where silicon oxide can be deposited. The bonding preparation involves a standard CMP and cleaning process prior to wafer bonding.
Is there heat or pressure involved in this bond process?
The bond process spontaneously starts at room temperature without external force required. The equipment to run the ZiBond™ process does not require costly heat or pressure capabilities. A very high bond energy > 1 J/m2 can be obtained at room temperature. Heat can be used to accelerate the bond process or obtain higher bond energies.
Can I only do wafer-to-wafer bonding?
The Ziptronix processes can be performed as wafer to wafer bonding or as die to wafer bonding processes. To benefit from the KGD approach the die to wafer bonding method is used. For high yielding die or small die sizes a wafer bond process can be used. The bond strength with ZiBond™ and interconnect quality with DBI® are the same for either method.
Can I only do face-to-face bonds?
Face to face bonds can be done as well as face to back bonds. Electrical connections with CMOS face to back bonds use TSVs (Through Silicon Vias). TSVs can be implemented before or after ZiBond™ or DBI®.
Is this a permanent bond?
Yes, ZiBond™ and DBI® are permanent bonds.
What types of silicon oxide can be used with ZiBond™ and DBI™?
PECVD, PVD, TEOS and thermal oxides can be used.
Does the oxide need to be on both substrates?
To achieve the highest bond strength it is recommended to have an oxide layer on both bond surfaces.
What is the interconnect density I can achieve?
The highest interconnect density Ziptronix has proven with the DBI® technology is 1.5 Million connections per cm2.
What wafer back end (BEOL) is DBI® compatible with?
DBI® is compatible with both Copper and Aluminum backends.
Is the bond hermetic?
The ZiBond™ and DBI® process provide hermetic bonds that have exceeded the MIL-STD 883-E test requirements.
Do I need to use an underfill material to help seal the bond surfaces?
DBI® does not require underfill materials
What type of bond is performed?
ZiBond™ and DBI® processes result in covalent bonding.
Is there an intermediate layer between the wafers?
The bond is formed between the oxide layers of the wafers without the need of adhesives or other intermediate layers.
What temperature do I need to bake/anneal the bonded wafers at to get a permanent bond?
The ZiBond™ process achieves a bond strength of 1J /m2 at room temperature. For even higher bond strength a bake cycle at 100-200 C is suggested.
How long is the bond cycle time?
The bond forms spontaneously on contact of the die and wafers. The cycle time is determined by the handling and alignment equipment.
Is this a batch process or one at a time?
The substrate bonding is performed one pair at a time. The ZiBond™ electrical interconnects are formed as a batch process at a 350C bake step for 2 hours.
Do I need special Fab tools or equipment?
All process steps for the ZiBond™ and DBI® process can be done on standard Fab tools.
Can this technology be used to encapsulate a cavity?
ZiBond™ and DBI® can be used to encapsulate cavities, for example for MEMS devices, with a 0.5 mm seal ring. ZiBond™ provides a hermetic seal (as per MIL-STD 883-E).
Do both substrates need to be the same materials?
Any substrate material that allows for deposition and chemo-mechanical polish (CMP) of oxide can be used with the Ziptronix ZiBond™ and DBI® process. The CMP surface specification is < 0.5 nm RMS, < 5 nm / 100 um planarity, and < 20 um bow and warp.
What is advantage of Ziptronix stacking method?
ZiBond™ provides a very high bond strength that often exceeds the strength of the materials bonded, i.e., silicon. This very high bond strength enables a wide range of post-bond processing including thinning to < 1 micron, via etch / fill, dicing without delamination, etc.
What is DBI®?
DBI® or Direct Bond Interconnect is an extension of the ZiBond™ bonding technology to include high density electrical interconnects across the bond interface.
How do I get my electrical connections out from between the bonded substrates?
There are several options to make the electrical connections like wire bonding. For high performance applications, through silicon vias can be used to route the signal through the die stack.
Does Ziptronix technology include TSVs in the wafers?
No. Ziptronix believes the best implementation of TSVs is in the CMOS or SOI wafer foundry between the front-end-of-line (FEOL) and back-end-of-line (BEOL) Please contact Ziptronix for more information regarding TSVs.
Can I run test vehicles at your facility to test this technology?
Ziptronix has a wafer processing line for process development and verification of ZiBond™ and DBI® technologies. This capability supports customer licensing and process transfer agreements that includes the fabrication of test vehicles.
How can I get access to the Ziptronix technology for use in my facility or for my devices?
Ziptronix offers a variety of licensing models which can be structured specifically to meet your company's needs. Depending on the type of license, we can provide technology transfer support and very light scale manufacturing to help bridge the gap between development and production. Please contact us at info@ziptronix.com
Information contained on this FAQ sheet are for introductory purposes only and are subject to change without notice.
